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Journal : Indonesian%20Journal%20of%20Electrical%20Engineering%20and%20Computer%20Science

A Low Cost C8051F006 SoC-Based Quasi-Static C-V Meter for Characterizing Semiconductor Devices Endah Rahmawati; Riska Ekawita; Maman Budiman; Mikrajuddin Abdullah; Khairurrijal Khairurrijal
Indonesian Journal of Electrical Engineering and Computer Science Vol 10, No 6: October 2012
Publisher : Institute of Advanced Engineering and Science

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Abstract

Based on a C8051F006 SoC (system on-a-chip), a simple and low cost quasi-static capacitance-voltage (C-V) meter was designed and developed to obtain C-V characteristics of semiconductor devices. The developed C-V meter consists of a capacitance meter, a programmable voltage source, a C8051F006 SoC-based slave controller, and a personal computer (PC) as a master controller. The communication between the master and slave controllers is facilitated by the RS 232 serial communication. The accuracy of the C-V meter was guaranteed by the calibration functions, which are employed by the program in the PC and obtained through the calibration processes of analog to digital converter (ADC), digital to analog converters (DACs) of the C8051F006 SoC, and the programmable voltage source.  Examining 33-pF and 1000-pF capacitors as well three different p-n junction diodes, it was found that the capacitances of common capacitors are in the range of specified values and typical C-V curves of p-n junction diodes are achieved. DOI: http://dx.doi.org/10.11591/telkomnika.v10i6.1182
Numerical Simulation of Tunneling Current in an Anisotropic Metal-Oxide-Semiconductor Capacitor Fatimah Arofiati Noor; Ferry Iskandar; Mikrajuddin Abdullah; Khairurrijal khairurrijal
Indonesian Journal of Electrical Engineering and Computer Science Vol 10, No 3: July 2012
Publisher : Institute of Advanced Engineering and Science

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Abstract

In this paper, we have developed a model of the tunneling currents through a high-k dielectric stack in MOS capacitors with anisotropic masses. The transmittance was numerically calculated by employing a transfer matrix method and including longitudinal-transverse kinetic energy coupling which is represented by an electron phase velocity in the gate. The transmittance was then applied to calculate tunneling currents in TiN/HfSiOxN/SiO2/p-Si MOS capacitors. The calculated results show that as the gate electron velocity increases, the transmittance decreases and therefore the tunneling current reduces. The tunneling current becomes lower as the effective oxide thickness (EOT) of HfSiOxN layer increases. When the incident electron passed through the barriers in the normal incident to the interface, the electron tunneling process becomes easier. It was also shown that the tunneling current was independent of the substrate orientation. Moreover, the model could be used in designing high speed MOS devices with low tunneling currents. DOI: http://dx.doi.org/10.11591/telkomnika.v10i3.607