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All Journal Perfecting a Video Game with Game Metrics Bulletin of Electrical Engineering and Informatics
Rahmat Talib
Universiti Tun Hussein Onn Malaysia
Computer Science & IT Electrical & Electronics Engineering

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Effect of Pump Dithering at Each Stage of Cascaded Fiber Optical Parametric Amplifier Fatin Nabilah Mohamad Salleh; Nor Shahida Mohd Shah; Nurulanati Othman; Rahmat Talib; Munirah Ab. Rahman
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 15, No 3: September 2017
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v15i3.7212

Abstract

Cascaded fiber optical parametric amplifier (FOPA) can enhance gain and bandwidth. The gain and bandwidth can be further enhanced by dithering the FOPA pump. However, to our knowledge, the effects of a pump dithering at every stage of cascaded FOPA have not been discussed. The study of performance at every stage of cascaded FOPA is quite interesting and beneficial in designing the system. Here, we analyzed, using OptiSystem software, each stage of a cascaded FOPA, when there was a pump dithering and not. The results showed that the pump dithering enhanced the gain and broaden the bandwidth at every stage. The gain and bandwidth obtained with the pump dithering were 27 dB and 20 nm, respectively. On the other hand, when there was no pump dithering, the gain and bandwidth were 9 dB and 12 nm, respectively.
Comparison study of 8-PPM, 8-DPIM, and 8-RDH-PIM modulator FPGA hardware design in term of bandwidth efficiency and transmission rate M. A. Ilyas; Maisara Othman; Rahmat Talib; R. Yahya; M. Yaacob; S. M. Mustam; M. B. Jaafar; C. B. M. Rashidi
Bulletin of Electrical Engineering and Informatics Vol 9, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (562.883 KB) | DOI: 10.11591/eei.v9i2.1871

Abstract

In this paper, a performance study of 8-Pulse-Position Modulation (PPM), 8-Digital Pulse Interval Modulation (DPIM), and 8-Reverse Dual Header-Pulse Interval Modulation (RDH-PIM) implementation in Verilog hardware design language is presented. The hardware design is chosen over software design since it could provide much more flexibility in term of transmission rate and reduce the workload of the processor in the complete system. Using 50 MHz clock as the reference data clock speeds, the transmission rate recorded are 11.11 Msymbol/second or 33.33 Mbps, 9.09 Msymbol/s or 27.27 Mbps, and 6.25 Msymbol/s or 18.75 Mbps for 8-RDH-PIM, 8-DPIM, and 8-PPM respectively. We conclude that 8-RDH-PIM modulator design provides better performance in term of bandwidth utilization and transmission rate as compared to 8-PPM and 8-DPIM.
Co-Authors C. B. M. Rashidi Fatin Nabilah Mohamad Salleh M. A. Ilyas M. B. Jaafar M. Yaacob Maisara Othman Munirah Ab. Rahman Nor Shahida Mohd Shah Nurulanati Othman R. Yahya S. M. Mustam