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All Journal Bulletin of Electrical Engineering and Informatics Bulletin of Electrical Engineering and Informatics Bulletin of Electrical Engineering and Informatics
Seong Mo Lee
Seoul National University of Science and Technology
Computer Science & IT Electrical & Electronics Engineering Engineering

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A Survey of Fault-Injection Methodologies for Soft Error Rate Modeling in Systems-on-Chips Yeong Seob Jeong; Seong Mo Lee; Seung Eun Lee
Bulletin of Electrical Engineering and Informatics Vol 5, No 2: June 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (320.328 KB) | DOI: 10.11591/eei.v5i2.526

Abstract

The development of process technology has increased system performance, but the system failure probability has also significantly increased. It is important to consider the system reliability in addition to the cost, performance, and power consumption. In this paper, we describe the types of faults that occur in a system and where these faults originate. Then, fault-injection techniques, which are used to characterize the fault rate of a system-on-chip (SoC), are investigated to provide a guideline to SoC designers for the realization of resilient SoCs.
A Survey of Fault-Injection Methodologies for Soft Error Rate Modeling in Systems-on-Chips Yeong Seob Jeong; Seong Mo Lee; Seung Eun Lee
Bulletin of Electrical Engineering and Informatics Vol 5, No 2: June 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (320.328 KB) | DOI: 10.11591/eei.v5i2.526

Abstract

The development of process technology has increased system performance, but the system failure probability has also significantly increased. It is important to consider the system reliability in addition to the cost, performance, and power consumption. In this paper, we describe the types of faults that occur in a system and where these faults originate. Then, fault-injection techniques, which are used to characterize the fault rate of a system-on-chip (SoC), are investigated to provide a guideline to SoC designers for the realization of resilient SoCs.
A Survey of Fault-Injection Methodologies for Soft Error Rate Modeling in Systems-on-Chips Yeong Seob Jeong; Seong Mo Lee; Seung Eun Lee
Bulletin of Electrical Engineering and Informatics Vol 5, No 2: June 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (320.328 KB) | DOI: 10.11591/eei.v5i2.526

Abstract

The development of process technology has increased system performance, but the system failure probability has also significantly increased. It is important to consider the system reliability in addition to the cost, performance, and power consumption. In this paper, we describe the types of faults that occur in a system and where these faults originate. Then, fault-injection techniques, which are used to characterize the fault rate of a system-on-chip (SoC), are investigated to provide a guideline to SoC designers for the realization of resilient SoCs.
Co-Authors Seung Eun Lee Yeong Seob Jeong