International Journal of Power Electronics and Drive Systems (IJPEDS)
Vol 10, No 3: September 2019

A novel single-phase PWM asymmetrical multilevel inverter with number of semiconductor switches reduction

S. Kakar (Universiti Teknologi Malaysia)
S. M. Ayob (Universiti Teknologi Malaysia)
N. M. Nordin (Universiti Teknologi Malaysia)
M. S. Arif (Universiti Teknologi Malaysia)
A. Jusoh (Universiti Teknologi Malaysia)
N. D. Muhamad (Universiti Teknologi Malaysia)

Article Info

Publish Date
01 Sep 2019


In this paper, a new asymmetrical multilevel inverter topology (MLI) is proposed with the objectives of using decreased number of semiconductor switches, dc voltage sources, gate driver circuits and dc links. The structure of presented MLI is very simple and modular. The fundamental module of this structure consists of nine semiconductor switches (eight unidirectional and one bidirectional) and four asymmetrical configured DC sources (ratio of 1:2), which can generate 13-level output voltage. To validate the design, a Matlab-Simulink based model is developed. For this paper, a Sinusoidal Pulse Width Modulation (SPWM) is deployed as the switching strategy of the proposed MLI. The circuit model is simulated under pure resistive and inductive loads. It will be shown that the circuit performs well under both loads. Comparison with traditional MLIs and other recently introduced MLIs will be conducted to show the superiority of the proposed MLI in terms of reduced number of devices and lower voltage stress across the switches.

Copyrights © 2019

Journal Info





Control & Systems Engineering Electrical & Electronics Engineering


International Journal of Power Electronics and Drive Systems (IJPEDS, ISSN: 2088-8694, a SCOPUS indexed Journal) is the official publication of the Institute of Advanced Engineering and Science (IAES). The scope of the journal includes all issues in the field of Power Electronics and drive systems. ...