JMECS (Journal of Measurements, Electronics, Communications, and Systems)
Vol 1 No 1 (2015): JMECS

Improvement in the LDPC Error Correction Process Based on FPGA Implementation

Tarigan Aditia (School of Electrical Engineering, Telkom University)
Rita Purnamasari (School of Electrical Engineering, Telkom University)
Efa Maydhona Saputra (School of Electrical Engineering, Telkom University)

Article Info

Publish Date
31 Dec 2015

Abstract

LDPC is one of channel coding technique which can achieve the nearest to the shannon limit. The focus of this paper is to give improvement for LDPC error correcting process using message passing algorithm. This works used FPGA Cyclon II for implementing the process. This paper worked with two different LDPC matrix, matrix (8, 16) and matrix (24, 48). Matrix (24,48) had wc = 4 and wr = 8. Matrix (8, 16) had wc = 2 and wr = 4. The comparison of these two matrix would present the effects in the error correcting decision for message passing algorithm and the effect for implementing the algorithm on FPGA Cyclon II. This research purpose was to prove message passing algorithm can provide more than one bit error correction.

Copyrights © 2015




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Journal Info
JMECS (Journal of Measurements, Electronics, Communications, and Systems)
Website

Abbrev

jmecs

Publisher

Universitas Telkom

Subject

Computer Science & IT Control & Systems Engineering Electrical & Electronics Engineering Engineering Materials Science & Nanotechnology

Description

Journal of Measurements, Electronics, Communications, and Systems (JMECS) is a scientific open access journal featuring original works on communication, electronics, instrumentation, measurement, robotics, and security networking. The journal is managed by the School of Electrical Engineering and ...