<![CDATA[Mostly some specific computer circuits and digital circuit applications need a random counter circuit module for handling specific tasks or operations. To design this kind of circuit, it is more common to use the standard format design of synchronous counter, although this will be more complicated to derive its truth table and karnaugh-maps in order to solve the right output equations for flip-flop inputs. This paper will introduce another way of designing a digital random counter, using shift register and encoder, which is easier to applied and the sequence of this counter can be managed randomly. The methodology being used for this research is mainly tounderstand the basic concept and combine the functions of shift register and encoder, to derive a new and simple form of designing a random counter. Using an Electronics Workbench software, the outputs are shown in logic simulation.]]>
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