<![CDATA[The technology of components and electronic hardware has evolved to be able to produce a DC/DC current system for power, which is achieved by converting the DC power to higher or lower voltage. This DC voltage variable is commonly called the DC-DC Converter. This final task aims to find out the performance of the DC-DC Sepic Converter series design. The simulated testing of the system using SIMULINK/MATLAB software is subsequently obtained from the data analysis of the theoretical output voltage data and the monitoring of measurements that can be analyzed to determine the error level as well as the level of efficiency of the design of the sepic converter. The test was conducted by setting a constant input voltage of 12 V, a frequency of 50 kHz, with a duty cycle variation of 5% to 65% and a given load of 20 Ī©. The result of the design of the Sepic Converter at the time of open loop mode with the value of duty Cycle of 5% produces a minimum voltage that is 0,38 V. Subsequently, when given the duty cicle value of 65%, the maximum voltage is 21,22 V error with the highest error rate of 1 V obtained at the 13th data trial. The average error value is 0,642 V and the standard deviation value is 0,453 V, the greatest efficiency point is 78,50% at the moment of the cycle duty value of 65. While the results of the testing of the Set of Sepic Konverters at the close loop mode, the input tension is given constantly 12 V. The configuration for the parameter value of PI is also constant, namely at the set point of 22,22 V, it is 21,97 V with an error difference 0,25 V.]]>
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