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Model of Pulsed Electrical Discharge Machining (EDM) using RL Circuit Ade Erawan Bin Minhat; Nor Hisham Bin Hj Khamis; Azli Bin Yahya; Trias Andromeda; Kartiko Nugroho
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 5, No 2: 2014
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (410.351 KB)

Abstract

This article presents a model of pulsed Electrical Discharge Machining (EDM) using RL circuit. There are several mathematical models have been successfully developed based on the initial, ignition and discharge phase of current and voltage gap. According to these models, the circuit schematic of transistor pulse power generator has been designed using electrical model in Matlab Simulink software to identify the profile of voltage and current during machining process. Then, the simulation results are compared with the experimental results.DOI: http://dx.doi.org/10.11591/ijpeds.v5i2.6681
Electrical Discharge Machining Flyback Converter using UC3842 Current Mode PWM Controller Nazriah Mahmud; Azli Yahya; Trias Andromeda
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 5, No 2: 2014
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar

Abstract

This paper presents a current mode Pulse Width Modulation (PWM) controlled Flyback converter using UC3842 for Electrical Discharge Machining current generator control circuit. Circuit simplicity and high efficiency can be achieved by a Flyback converter with current mode PWM controller. The behaviors of the system's operation is analyzed and discussed by varying the load resistance. Matlab sofware is used to simulate the Flyback converter where a prototype has been built and tested to verify it's performance. DOI: http://dx.doi.org/10.11591/ijpeds.v5i2.6680
Incremental High Throughput Network Traffic Classifier H.R. Loo; Alireza Monemi; Trias Andromeda; M. N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 4: EECSI 2017
Publisher : IAES Indonesia Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (455.888 KB) | DOI: 10.11591/eecsi.v4.988

Abstract

Today’s network traffic are dynamic and fast. Con-ventional network traffic classification based on flow feature and data mining are not able to process traffic efficiently. Hardware based network traffic classifier is needed to be adaptable to dynamic network state and to provide accurate and updated classification at high speed. In this paper, a hardware architecture of online incremental semi-supervised algorithm is proposed. The hardware architecture is designed such that it is suitable to be incorporated in NetFPGA reference switch design. The experimental results on real datasets show that with only 10% of labeled data, the proposed architecture can perform online classification of network traffic at 1Gbps bitrate with 91% average accuracy without loosing any flows.