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All Journal Indonesian Journal of Electrical Engineering and Informatics (IJEEI)
P. Satish Kumar
University College Of Engineering Osmania University
Computer Science & IT Electrical & Electronics Engineering

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Analysis and Design of Solar Photo voltaic Grid Connected Inverter Muddasani Satyanarayana; P. Satish Kumar
Indonesian Journal of Electrical Engineering and Informatics (IJEEI) Vol 3, No 4: December 2015
Publisher : IAES Indonesian Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.52549/ijeei.v3i4.174

Abstract

This paper presents common mode voltage analysis of single phase grid connected photovoltaic inverter. Many researchers proposed different grid tie inverters for applications like domestic powering, street lighting, water pumping, cooling and heating applications, however traditional grid tie PV inverter uses either a line frequency or a high frequency transformer between the inverter and grid but losses will increase in the network leading to reduced efficiency of the system. In order to increase the efficiency, with reduced size and cost of the system, the effective solution is to remove the isolation transformer. But common mode (CM) ground leakage current due to parasitic capacitance between the PV panels and the ground making the system unreliable. The common mode current reduces the efficiency of power conversion stage, affects the quality of grid current, deteriorate the electric magnetic compatibility and give rise to the safety threats. In order to eliminate the common mode leakage current in Transformerless PV systm two control algorithms of multi-carrier pwm are implemented and compared for performance analysis.The shoot-through issue that is encountered by traditional voltage source inverter is analyzed for enhanced system reliability. These control algorithms are compared for common mode voltage and THD comparisons. The proposed system is designed using MATLAB/SIMULINK software for analysis.
Investigation of TTMC-SVPWM Strategies for Diode Clamped and Cascaded H-bridge Multi-level Inverter Fed Induction Motor Drive Ravikumar Bhukya; P. Satish Kumar
Indonesian Journal of Electrical Engineering and Informatics (IJEEI) Vol 5, No 3: September 2017
Publisher : IAES Indonesian Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.52549/ijeei.v5i3.305

Abstract

This paper presents a concept of two types multilevel inverters such as diode clamped and cascaded H-bridge for harmonic reduction on high power applications. Normally, multilevel inverters can be used to reduce the harmonic problems in electrical distribution systems. This paer focused on the performance and analysis of a three phase seven level inverter including diode clamped and cascaded H-bridge based on new tripizodal triangular space vector PWM technique approaches. TTMC based modified Space vector Pulse width modulation technique so called tripizodal triangular Space vector Pulse width modulation (TTMC-SVPWM) technique. In this paper the reference sine wave generated as in case of conventional off set injected SVPWM technique. It is observed that the TTMC-Space vector pulse width modulation ensures excellent, close to optimized pulse distribution results and THD is compared to seven level, diode clamped and cascaded multi level inverters. Theoretical investigations were confirmed by the digital simulations using MATLAB/SIMULINK software.
Co-Authors Muddasani Satyanarayana Ravikumar Bhukya