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Analisis Kualitas Geometri Mesin Bubut Maximat Super 11 Eko Indrawan; Yufrizal A; Abdul Aziz; Rifelino Rifelino; Muhammad Iqbal Tawakal
invotek Vol 20 No 3 (2020): INVOTEK: Jurnal Inovasi Vokasional dan Teknologi
Publisher : Universitas Negeri Padang

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.24036/invotek.v20i3.636

Abstract

Penelitian ini bertujuan sejauh mana tingkat kepresisian dari mesin bubut maximat super 11 di Laboratorium Teknologi Produksi. Pengumpulan data dilakukan pengujian putaran (run out) spindle nose, pengujian ketirusan lubang spindle nose, pengujian kelurusan tailstock guideways terhadap gerakan eretan dan pengujian kebulatan terhadap benda kerja dalam pembubutan rata. Hasil penelitian pengujian putaran (run out) spindle nose masih dalam batas toleransi yang ditetapkan schlesinger standart (0.01 mm), pengujian ketirusan lubang spindle nose hampir secara keselurahan mesin sudah melewati batas penyimpangan yang diizinkan (posisi A = 0.01 mm, posisi B = 0.02 mm per 30 mm), pengujian kelurusan lintasan semua mesin sudah melewati batas penyimpangan (0.01 mm per 500 mm) dan dicobakan untuk pembubutan rata pada benda kerja (spesimen) ditentukan untuk 2 mesin dengan penyimpangan terkecil (M17) dan terbesar (M20) dari keseluruhan mesin dan setelah diuji tingkat kebulatan dari kedua benda disimpulkan masih dalam batas toleransi yang diizinkan (0.015 mm per 120 mm).
INVESTIGATION OF FLIP-FLOP PERFORMANCE ON DIFFERENT TYPE AND ARCHITECTURE IN SHIFT REGISTER WITH PARALLEL LOAD APPLICATIONS Dwi Purnomo; Machmud Roby Alhamidi; Ari Wibisono; Muhammad Iqbal Tawakal
Jurnal Ilmu Komputer dan Informasi Vol 8, No 2 (2015): Jurnal Ilmu Komputer dan Informasi (Journal of Computer Science and Information)
Publisher : Faculty of Computer Science - Universitas Indonesia

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (268.786 KB) | DOI: 10.21609/jiki.v8i2.306

Abstract

Register is one of the computer components that have a key role in computer organisation. Every computer contains millions of registers that are manifested by flip-flop. This research focuses on the investigation of flip-flop performance based on its type (D, T, S-R, and J-K) and architecture (structural, behavioural, and hybrid). Each type of flip-flop on each architecture would be tested in different bit of shift register with parallel load applications. The experiment criteria that will be assessed are power consumption, resources required, memory required, latency, and efficiency. Based on the experiment, it could be shown that D flip-flop and hybrid architecture showed the best performance in required memory, latency, power consumption, and efficiency. In addition, the experiment results showed that the greater the register number, the less efficient the system would be.