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Adi Faizal
STMIK Jakarta STI&K
Computer Science & IT

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THREE STATE LOGIC PROBE Adi Faizal; Drs. Lingga Hermanto, MMSI
Jurnal Sistem Komputer 2005
Publisher : STMIK Jakarta

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Abstract

Created a logic level detection circuit of a digital circuit. This circuit has the ability to3 (three) logic level digital signal is typically defined as follows: Level of highvoltage (High), low voltage level (Low) and the threshold voltage level (Theresehold).The ability of this series allows a digital circuit analysis to help level the better. Inthis series of tests in particular applied to the gates of the base.
THREE STATE LOGIC PROBE Adi Faizal; Drs. Lingga Hermanto, MMSI
Jurnal Sistem Komputer 2005
Publisher : STMIK Jakarta

Show Abstract | Download Original | Original Source | Check in Google Scholar

Abstract

Created a logic level detection circuit of a digital circuit. This circuit has the ability to 3 (three) logic level digital signal is typically defined as follows: Level of high voltage (High), Level low voltage (Low) and the threshold voltage level (Thereshold). The ability of  this series allows a digital circuit analysis to help level the better. In this series of tests in particular applied to the gates of the base. 
Co-Authors Drs. Lingga Hermanto, MMSI