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A Low Cost C8051F006 SoC-Based Quasi-Static C-V Meter for Characterizing Semiconductor Devices Endah Rahmawati; Riska Ekawita; Maman Budiman; Mikrajuddin Abdullah; Khairurrijal Khairurrijal
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 10, No 4: December 2012
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v10i4.862

Based on a C8051F006 SoC (system on-a-chip), a simple and low cost quasi-static capacitance-voltage (C-V) meter was designed and developed to obtain C-V characteristics of semiconductor devices. The developed C-V meter consists of a capacitance meter, a programmable voltage source, a C8051F006 SoC-based slave controller, and a personal computer (PC) as a master controller. The communication between the master and slave controllers is facilitated by the RS 232 serial communication. The accuracy of the C-V meter was guaranteed by the calibration functions, which are employed by the program in the PC and obtained through the calibration processes of analog to digital converter (ADC), digital to analog converters (DACs) of the C8051F006 SoC, and the programmable voltage source. Examining 33-pF and 1000-pF capacitors as well three different p-n junction diodes, it was found that the capacitances of common capacitors are in the range of specified values and typical C-V curves of p-n junction diodes are achieved.

Numerical Simulation of Tunneling Current in an Anisotropic Metal-Oxide-Semiconductor Capacitor Fatimah A. Noor; Ferry Iskandar; Mikrajuddin Abdullah; Khairurrijal Khairurrijal
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 10, No 3: September 2012
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v10i3.826

In this paper, we have developed a model of the tunneling current through a high- dielectric stack in MOS capacitors with anisotropic masses. The transmittance was numerically calculated by employing a transfer matrix method and including longitudinal-transverse kinetic energy coupling which is represented by an electron phase velocity in the gate. The transmittance was then applied to calculate tunneling currents in TiN/HfSiOxN/SiO2/p-Si MOS capacitors. The calculated results show that as the gate electron velocity increases, the transmittance decreases and therefore the tunneling current reduces. The tunneling current becomes lower as the equivalent oxide thickness (EOT) of HfSiOxN layer increases. When the incident electron passed through the barriers in the normal incident to the interface, the electron tunneling process becomes easier. It was also shown that the tunneling current was independent of the substrate orientation. Moreover, the model could be used in designing high speed MOS devices with low tunneling currents.

Silver Nanorods Layer Based on Polyvinyl Alcohol on Glass Substrates by Dip-Coating Method Junaidi Junaidi; Agus Riyanto; Kuwat Triyana; Khairurrijal Khairurrijal
Jurnal Penelitian Fisika dan Aplikasinya (JPFA) Vol. 9 No. 1 (2019)
Publisher : Universitas Negeri Surabaya

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.26740/jpfa.v9n1.p1-9

This research reports the investigation of the performance of a thin layer based on silver nanorods using the dip-coating method. The synthesis was conducted by polyol method at an oil bath temperature of 140 °C. In the synthesis of silver nanorods, materials used were silver nitrate (AgNO3) as the main raw material, ethylene glycol (EG) as the solvent, and a small amount of sodium chloride (NaCl) as a mediated-agent (precursor). Polyvinyl alcohol (PVA) used as a capping agent and stabilizer in this process. Diameter and length of silver nanorods were 800 nm and 15 µm, respectively. Furthermore, the silver nanorods suspension was deposition onto a glass substrate with a variety of dipping cycles. The result showed the thickness of the thin layer is linear with a number of dipping cycles. Electrical and optical properties of thin layer show that sheet resistance about of 30 Î© sq-1 by transmittance above of 80%. The silver nanorods thin film can be used as a conductive and transparent electrode for various optoelectronic applications.

Porous Si (111) Fabrication Using Electrochemical Anodization: Effects of Electrode Distance and Current Density Risa Suryana; Fauzi Ahmad Bogas; Kuwat Triyana; Khairurrijal Khairurrijal; Heru Susanto
Jurnal Teori dan Aplikasi Fisika Vol 9, No 1 (2021): Jurnal Teori dan Aplikasi Fisika
Publisher : Universitas Lampung

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.23960/jtaf.v9i1.2705

Porous silicon (PSi) has developed for many applications such as gas and humidity sensors. Various methods are available to fabricate PSi, and electrochemical anodization is common due to low cost and easy use. Current density, etching/anodization time, type of etching solution, and electrode distance are the parameters determining resulting pores. The substrate used n-type silicon wafer with (111)-orientation and resistivity of 1.5-4.5 Ω.cm with a size of 1.5×1 cm2. The cleaning process of the samples employed the RCA cleaning procedure. Conductive contacts required for the electrochemical anodization were aluminum on the samples. The electrodes were the Si sample acting as anode and platinum (Pt) electrode as a cathode. The etching solution using a mixture of HF (40%) and ethanol (99%) with a 1:1 ratio. The electrode distance was 1.5, 2.0, and 2.5 cm. The current density for each electrode distance was 10, 30, and 50 mA/cm2 with an anodization time of 30 min. SEM and UV-Vis characterizations were applied to obtain surface morphology and reflectance, respectively. For all samples, the reflectance of PSi was lower than the reflectance of the original silicon surface (no pores). This condition indicates that the PSi is suitable as an anti-reflective layer in a solar cell. However, the PSi of reflectance curves has irregular shapes as a function of wavelength for different electrode distance and the current density. The SEM images confirmed that the pores formed on the silicon surface were inhomogeneous. The pore size decreased with the increase of the electrode distance while it increased as the increase of the current density. There was a correlation between pores size and reflectance at specific wavelength numbers.

A Low Cost C8051F006 SoC-Based Quasi-Static C-V Meter for Characterizing Semiconductor Devices Endah Rahmawati; Riska Ekawita; Maman Budiman; Mikrajuddin Abdullah; Khairurrijal Khairurrijal
Indonesian Journal of Electrical Engineering and Computer Science Vol 10, No 6: October 2012
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar

Based on a C8051F006 SoC (system on-a-chip), a simple and low cost quasi-static capacitance-voltage (C-V) meter was designed and developed to obtain C-V characteristics of semiconductor devices. The developed C-V meter consists of a capacitance meter, a programmable voltage source, a C8051F006 SoC-based slave controller, and a personal computer (PC) as a master controller. The communication between the master and slave controllers is facilitated by the RS 232 serial communication. The accuracy of the C-V meter was guaranteed by the calibration functions, which are employed by the program in the PC and obtained through the calibration processes of analog to digital converter (ADC), digital to analog converters (DACs) of the C8051F006 SoC, and the programmable voltage source. Examining 33-pF and 1000-pF capacitors as well three different p-n junction diodes, it was found that the capacitances of common capacitors are in the range of specified values and typical C-V curves of p-n junction diodes are achieved. DOI: http://dx.doi.org/10.11591/telkomnika.v10i6.1182

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