Article Per Year (5 Year)
p-Index From 2019 - 2024
0
P-Index
This Author published in this journals
All Journal Proceeding of the Electrical Engineering Computer Science and Informatics
Jeevan Sirkunan
Faculty of Electrical Engineering, Universiti Teknologi Malaysia
Computer Science & IT Electrical & Electronics Engineering

Published : 1 Documents Claim Missing Document
Claim Missing Document
Check
Articles

Found 1 Documents
Search

 1 
Configurable Version Management Hardware Transactional Memory for Multi-processor Platform Jeevan Sirkunan; Chia Yee Ooi; N. Shaikh Husin; Yuan Wen Hau; Trias Andromeda; M. N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 1: EECSI 2014
Publisher : IAES Indonesia Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (755.231 KB) | DOI: 10.11591/eecsi.v1.409

Abstract

Programming on a shared memory multi-processor platforms in an efficient way is difficult as locked based synchronization limits the efficiency. Transactional memory (TM) is a promising approach in creating an abstraction layer for multi-threaded programming. However, the performance of TM is application-specific. In general, the configuration of a TM is divided into version management and conflict management. Each scheme has its strengths and weaknesses depending on executing application. Previous TM implementations for embedded system were built on fixed version management configuration which results in significant performance loss when transaction behaviour changes. In this paper, we propose a hardware transactional memory (HTM) with interchangeable version management. Random requests at different contention levels are used to verify the performance of the proposed TM. The proposed architecture is targeted for embedded applications and is area-efficient compared to current implementations that apply cache coherence protocols.
Co-Authors Andromeda, Trias Chia Yee Ooi M. N. Marsono N. Shaikh Husin Yuan Wen Hau