Claim Missing Document
Check
Articles

Found 18 Documents
Search

Performance Evaluation of Centralized Reconfigurable Transmitting Power Scheme in Wireless Network-on-chip M. S. Rusli; A. A. H. Ab Rahman; U. U. Sheikh; N. Shaikh Husin; Michael L. P. Tan; T. Andromeda; M. N. Marsono
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 16, No 6: December 2018
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v16i6.9306

Abstract

Network-on-chip (NoC) is an on-chip communication network that allows parallel communication among all cores to improve inter-core performance. Wireless NoC (WiNoC) introduces long-range and high bandwidth radio frequency (RF) interconnects that can possibly reduce the multi-hop communication of the planar metal interconnects in conventional NoC platforms. In WiNoC, RF transceivers account for a significant power consumption, particularly its transmitter, out of its total communication energy. This paper evaluates the energy and latency performance of a closed loop power management mechanism which enables transmitting power reconfiguration in WiNoC based on number of erroneous received packets. The scheme achieves significant energy savings with limited performance degradation and insignificant impact on throughput.
IMPLEMENTASI IEC 61131-3 PADA OTOMATISASI PEMBUATAN TIRAMISU Trias Andromeda; Iwan Setiawan; Riva Amrulloh
Jurnal Teknologi Elektro Vol 5 No 2 (2006): (July - December) Majalah Ilmiah Teknologi Elektro
Publisher : Universitas Udayana

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (322.883 KB)

Abstract

Penelitian ini dilakukan untuk mempelajari dan mengimplementasikan IEC 61131-3 pada otomatisasipembuatan tiramisu. Selama sepuluh hingga lima belas tahun terakhir, berbagai bahasa pemrograman yang berbedatelah digunakan untuk memprogram Programmable Logic Controler (PLC). Untuk satu bahasa pemrograman sajamisalnya Ladder Diagram, tiap-tiap jenis PLC mempunyai aturan dan cara pemrograman yang berbeda-beda.Padahal industri modern biasanya tidak hanya menggunakan satu jenis PLC saja melainkan berbagai jenis PLC, halini akan menjadi tidak effisien, baik dari segi waktu maupun uang.IEC 61131-3 merupakan bagian ketiga dari IEC 61131 yang membahas mengenai standar pemrograman PLC.Pada bagian bahasa pemrograman, IEC 61131-3 ini mengakomodasi 5 bahasa pemrograman PLC berbeda, yang kelimanya bisa digabung/digunakan secara bersamaan ataupun terpisah tergantung proses yang akan dikendalikan.Sedangkan pada bagian elemen umum terdapat Program Organization Units (POUs) yang terdiri dari FUN, FB danPRG, ketiganya merupakan unsur yang digunakan untuk membangun sebuah project aplikasi kendali industri.Poject dibuat dengan bantuan perangkat lunak FPWIN Pro 4.0 versi demo dan PLC Nais FP0-C16T sebagaikontroler.Dalam penelitian ini, IEC 61131-3 diimplementasikan untuk otomatisasi pembuatan tiramisu. Hasil pengujiandan implementasi membuktikan bahwa antara satu bahasa dengan bahasa lainnya, memiliki hasil dan tingkatkeberhasilan yang sama, artinya dengan IEC 61131-3, project yang sama dapat diprogram dengan bahasapemrograman yang berbeda-beda.
SURFACE HARDENING CHARACTERIZATION OF TRANSMISSION GEARS Rifky Ismail; . Jamari; M. Tauviqirrahman; . Sugiyanto; Trias Andromeda
Prosiding SNST Fakultas Teknik Vol 1, No 1 (2011): PROSIDING SEMINAR NASIONAL SAINS DAN TEKNOLOGI 2 2011
Publisher : Prosiding SNST Fakultas Teknik

Show Abstract | Download Original | Original Source | Check in Google Scholar

Abstract

This paper is presented to compare the transmission gear products from SME (UKM gear) and national scale manufacturer (OEM gear) especially on the surface hardening characterization. Both gears  were  heat  treated with  different methods.  The gear product of SME was  heat treated by pack carburizing and quenching whereas the OEM gear was predicted to be heat treated using induction  heating with high frequency. The surface hardening characterization was conducted by investigating the hardening thickness,  the hardness number  and the microstructure  observation  on the gear surfaces.  The result  of the hardening thickness investigation reveals a distinction on the depth of hardening penetration. The heat treatment using  long interval  pack carburizing  of UKM gear  produces a  deeper  penetration and the higher hardness number on the gear surface whereas the OEM gear has a thin hardness penetration and lower hardness number.  The microstructure of  the  both gears  depicts the different types  of phase. The  SME  gear shows the present of the carbon  infiltration  on the martensitic phase structure boundary whereas the OEM gear exhibits lower bainite phase on the gear surface. With this condition the OEM gear is predicted to behave a better contact stress distribution during operation. Keywords: gear, heat treatment, surface hardening, microstructure
Desain Konseptual Hybrid Engine System pada Kapal Tugboat 1636 HP dengan Kombinasi Diesel Engine dan Electric Motor Yang di Suplai Tenaga Baterai Timothy Andromeda Saragih; Hartono Yudo; Imam Pujo Mulyatno
Jurnal Teknik Perkapalan Vol 8, No 4 (2020): Oktober
Publisher : Diponegoro University

Show Abstract | Download Original | Original Source | Check in Google Scholar

Abstract

Hybrid Engine System adalah penggunaan penggerak ganda pada system penggerak yang sudah di temukan sejak tahun 1902 oleh Ferdinan Porsche. Sementara itu beberapa penelitian dan perusahaan telah mengembangkan system ini di kapal, salah satunya Tugboat. Penerapan system ini pada penelitian sebelumnya di kapal, telah terbukti memiliki dampak berkurangnya konsumsi bahan bakar realtime dan Time Between Overhaul (TBO) dari sebuah mesin konvensional. Penggunaan Bahan Bakar Minyak pada mesin internal combustion engine (konvesional) perlu diminimalisir penggunaannya untuk efisiensi jangka panjang. Penelitian pada tugas akhir ini bertujuan untuk menganalisa pengurangan komsumsi bahan bakar mesin utama kapal terhadap penerapan engine hybrid system. Pengerjaan diawali dengan menganalisa hambatan kapal menggunakan software, dengan metode Van Oortmeersen. Data hambatan yang telah didapat akan digunakan sebagai acuan untuk menentukan daya disetiap mode operasi tugboat. Variasi daya pada setiap mode operasi (standby, cruising, & assisting) digunakan untuk menentukan jumlah konsumsi BBM tugboat. Hasil analisa didapat konsumsi bahan bakar system permesinan hybrid mengurangi konsumsi BBM sebesar 19,06% dibanding system permesinan konvensional.
Energy-Aware Network-on-Chip Application Mapping Based on Domain Knowledge Genetic Algorithm Yin Zhen Tei; Yuan Wen Hau; N. Shaikh-Husin; Trias Andromeda; M. N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 1: EECSI 2014
Publisher : IAES Indonesia Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1359.964 KB) | DOI: 10.11591/eecsi.v1.352

Abstract

This paper addresses energy-aware application mapping for large-scale Network-on-chip (NoC). The increasing number of intellectual property (IP) cores in multi-processor system-on-chips (MPSoCs) makes NoC application mapping more challenging to find optimum core-to-topology mapping. This paper proposes an application mapping technique that incorporates domain knowledge into genetic algorithm (GA) to minimize the energy consumption of NoC communication. The GA is initialized with knowledge on network partition whereas the genetic crossover operator is guided with inter-core communication demands. NoC energy estimation is based on analytical energy model and cycle-accurate Noxim simulation. For large-scale NoC, application mapping using knowledge-based genetic operator saves up to 28% energy compared to the one on conventional GA. Adding knowledge-based initial mapping speeds up convergence by 81% and further saves energy by 5% compared to only knowledge-based crossover GA. Furthermore, cycle-accurate simulations of applications with traffic dependency show the effectiveness of the proposed application mapping for large-scale NoC.
Online Data Stream Learning and Classification with Limited Labels Loo Hui Ru; Trias Andromeda; M. N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 1: EECSI 2014
Publisher : IAES Indonesia Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (680.855 KB) | DOI: 10.11591/eecsi.v1.366

Abstract

Mining data streams such as Internet traffic andnetwork security is complex. Due to the difficulty of storage, datastreams analytics need to be done in one scan. This limits thetime to observe stream feature and hence, further complicatesthe data mining processes. Traditional supervised data miningwith batch training natural is not suitable to mine data streams.This paper proposes an algorithm for online data streamclassification and learning with limited labels using selective selftrainingsemi-supervised classification. The experimental resultsshow it is able to achieve up to 99.6% average accuracy for 10%labeled data and 98.6% average accuracy for 1% labeled data. Itcan classify up to 34K instances per second.
Configurable Version Management Hardware Transactional Memory for Multi-processor Platform Jeevan Sirkunan; Chia Yee Ooi; N. Shaikh Husin; Yuan Wen Hau; Trias Andromeda; M. N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 1: EECSI 2014
Publisher : IAES Indonesia Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (755.231 KB) | DOI: 10.11591/eecsi.v1.409

Abstract

Programming on a shared memory multi-processor platforms in an efficient way is difficult as locked based synchronization limits the efficiency. Transactional memory (TM) is a promising approach in creating an abstraction layer for multi-threaded programming. However, the performance of TM is application-specific. In general, the configuration of a TM is divided into version management and conflict management. Each scheme has its strengths and weaknesses depending on executing application. Previous TM implementations for embedded system were built on fixed version management configuration which results in significant performance loss when transaction behaviour changes. In this paper, we propose a hardware transactional memory (HTM) with interchangeable version management. Random requests at different contention levels are used to verify the performance of the proposed TM. The proposed architecture is targeted for embedded applications and is area-efficient compared to current implementations that apply cache coherence protocols.
Reconfigurable Logic Embedded Architecture of Support Vector Machine Linear Kernel Jeevan Sirkunan; N. Shaikh-Husin; Trias Andromeda; M. N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 4: EECSI 2017
Publisher : IAES Indonesia Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (454.392 KB) | DOI: 10.11591/eecsi.v4.991

Abstract

Support Vector  Machine  (SVM) is a linear  binary classifier  that  requires a  kernel  function  to  handle  non-linear problems.  Most  previous  SVM  implementations for  embedded systems  in literature were  built  targeting a certain  application; where analyses were done through comparison  with software im- plementations only. The impact  of different  application datasets towards  SVM hardware performance were not analyzed.  In this work,  we propose  a parameterizable linear  kernel  architecture that  is fully pipelined.  It  is prototyped and  analyzed  on Altera Cyclone  IV  platform   and  results  are  verified  with  equivalent software  model.  Further analysis  is  done  on  determining the effect  of  the  number of  features   and  support   vectors  on  the performance of the  hardware architecture. From  our  proposed linear  kernel  implementation, the number of features  determine the maximum  operating frequency  and amount  of logic resource utilization,  whereas  the  number of support   vectors  determines the  amount  of on-chip  memory  usage  and  also the  throughput of the system.
A Comparisson of Synchronous and Nonsynchronous Boost Converter Mohamad Isnaeni Romadhon; Trias Andromeda; Mochammad Facta; Agung Warsito
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 3: EECSI 2016
Publisher : IAES Indonesia Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (767.174 KB) | DOI: 10.11591/eecsi.v3.1135

Abstract

Modern electronic systems require resources with high efficiency. The efficiency of direct current to dicrect current converters as a power source can be increased by replacing a diode with MOSFET. The use of MOSFET is expected to reduce power loss as the internal resistance of MOSFET is lower than a diode. To implement the propossed idea, a boost type direct current chopper and TL494 as PWM generator circuit were applied in this work. MOSFET is used in synchronization mode to replace diode at conventional topology of chopper.. The proposed circuit and conventional topology were made and their performance were observed. The efficiency of both circuit were compared and analyzed. The result of the experiments showed that the efficiency of converter within MOSFET at synchronization mode is proportional with the increment of duty cycle, while at conventional topology the efficiency remain stable at any duty cycle. Synchronous boost converter is more efficient than nonsynchronous boost converter at duty cycle over than 40%.
Cooperative Learning for Distributed In-Network Traffic Classification S.B. Joseph; H.R. Loo; I. Ismail; T. Andromeda; M.N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 3: EECSI 2016
Publisher : IAES Indonesia Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (861.052 KB) | DOI: 10.11591/eecsi.v3.1144

Abstract

Inspired by the concept of autonomic distributed/decentralized network management schemes, we consider the issue of information exchange among distributed network nodes to network performance and promote scalability for in-network monitoring. In this paper, we propose a cooperative  learning  algorithm  for  propagation and  synchronization of network information among autonomic distributed network nodes for online traffic classification. The results show that network nodes with sharing capability perform better with a higher average accuracy of 89.21% (sharing data) and 88.37% (sharing clusters) compared to 88.06% for nodes without cooperative learning capability. The overall performance indicates that cooperative learning is promising for distributed in-network traffic classification.