Aiman Zakwan Jidin
Universiti Teknikal Malaysia Melaka

Published : 13 Documents Claim Missing Document
Claim Missing Document
Check
Articles

Found 13 Documents
Search

Flood disaster indicator of water level monitoring system Wan Haszerila Wan Hassan; Aiman Zakwan Jidin; Siti Asma Che Aziz; Norain Rahim
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 3: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (443.374 KB) | DOI: 10.11591/ijece.v9i3.pp1694-1699

Abstract

The early warning systems for flood management have been developed rapidly with the growth of technologies. These system help to alert people early with the used of Short Message Service (SMS) via Global System for Mobile Communications (GSM). This paper presents a simple, portable and low cost of early warning system using Arduino board, which is used to control the whole system and GSM shields to send the data. System has been designed and implemented based on two components which is hardware and software. The model determines the water level using float switch sensors, then it analyzes the collected data and determine the type of danger present. The detected level is translated into an alert message and sent to the user. The GSM network is used to connect the overall system units via SMS.
Low-cost and portable automatic sheet cutter Mohd Syafiq Mispan; Ahmad Hafizzudin Mustafa; Hafez Sarkawi; Aiman Zakwan Jidin
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 5: October 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1837.368 KB) | DOI: 10.11591/ijece.v10i5.pp5139-5146

Abstract

Process automation is crucial to increase productivity, more efficient use of materials, better product quality, improved safety, etc. In small-medium enterprise (SME) businesses related to household retailing, one of the process automation needed is the measurement and cutting of the mat or sheet, made of rubber or polyvinyl chloride (PVC) materials. Most of the household retailers that selling the sheet, the process of measuring and cutting according to the customer’s requirements are manually performed using a measuring tape and scissors. These manual processes can cause inaccuracy in length, inefficient use of material, low productivity and reduce product quality. This paper presents a low cost and portable automatic sheet cutter using the Arduino development board, which is used to control the process of measuring and cutting the materials. The system uses a push-button where the user can set the required length and quantity of the sheet. Once the required information is set, the stepper motor rolls the sheet until the required length is satisfied. Subsequently, another stepper motor moves the cutter horizontally and cut the sheet. With the automatic sheet cutter, the material is cut with acceptable precision. The design of the automatic sheet cutter is low cost and portable which significantly suitable to be used by SME household retailers.
Strategies for FPGA Implementation of Non-Restoring Square Root Algorithm Tole Sutikno; Aiman Zakwan Jidin; Auzani Jidin; Nik Rumzi Nik Idris
International Journal of Electrical and Computer Engineering (IJECE) Vol 4, No 4: August 2014
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (94.039 KB)

Abstract

This paper presents three strategies to implement non restoring square root algorithm based on FPGA. A new basic building block is called controlled subtract-multiplex (CSM) is introduced in first strategy which use gate level abstraction. The main principle of the method is similar with conventional non-restoring algorithm, but it only uses subtract operation and append 01, while add operation and append 11 is not used. Second strategy presents the first strategy in register transfer level (RTL) abstraction. In third strategy, a modification for the implementation of conventional non-restoring algorithm is presented which also use RTL abstraction. The all above strategies is implemented in VHDL programming and adopt fully pipelined architecture. The strategies have conducted to implement successfully in FPGA hardware, and each of the strategies is offer an efficient in hardware resource. In generally, the third strategy is superior.DOI:http://dx.doi.org/10.11591/ijece.v4i4.6008
Improve performance of the digital sinusoidal generator in FPGA by memory usage optimization Aiman Zakwan Jidin; Irna Nadira Mahzan; A. Shamsul Rahimi A. Subki; Wan Haszerila Wan Hassan
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 3: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (467.12 KB) | DOI: 10.11591/ijece.v9i3.pp1742-1749

Abstract

This paper presented the improvement in the performance of the digital sinusoidal signal generator, which was implemented in FPGA, by optimizing the usage of the available memory onboard. The sine wave was generated by using a Lookup Table method, where its pre-calculated values were stored in the onboard memory, and its frequency can be adjustable by changing the incremental step value of the memory address. In this proposed research, the memory stores only 25000 samples of the first quarter from a period of a sine wave and thus, the output signal accuracy was increased and the output frequency range was expanded, compared to the previous research. The proposed design was successfully developed and implemented in ALTERA Cyclone III DE0 FPGA Development Board, and its functionality was validated via functional simulation in Modelsim and also hardware experimental results observation in SignalTap II.
Hardware implementation of single phase three-level cascaded h-bridge multilevel inverter using sinusoidal pulse width modulation A. Shamsul Rahimi A. Subki; Mohd Zaidi Mohd Tumari; Wan Norhisyam Abd Rashid; Aiman Zakwan Jidin; Ahmad Nizammuddin Muhammad Mustafa
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 10, No 2: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (666.936 KB) | DOI: 10.11591/ijpeds.v10.i2.pp625-635

Abstract

In this paper a hardware implementation of single-phase cascaded H-bridge three level multilevel inverter (MLI) using sinusoidal pulse width modulation (SPWM) is presented. There are a few interesting features of using this configuration, where less component count, less switching losses, and improved output voltage/current waveform. The output of power inverter consists of three form, that is, square wave, modified square wave and pure sine wave. The pure sine wave and modified square wave are more expensive than square wave. The focus paper is to generate a PWM signal which control the switching of MOSFET power semiconductor. The sine wave can be created by using the concept of Schmitt-Trigger oscillator and low-pass filter topology followed by half of the waveform will be eliminated by using the circuit of precision half-wave rectifier. Waveform was inverted with 180º by circuit of inverting op-amp amplifier in order to compare saw-tooth waveform. Two of PWM signal were produced by circuit of PWM and used digital inverter to invert the two PWM signal before this PWM signal will be passed to 2 MOSFET driver and a 3-level output waveform with 45 Hz was produced. As a conclusion, a 3-level output waveform is produced with output voltage and current recorded at 22.5 Vrms and 4.5 Arms. The value of measured resistance is 0.015 Ω that cause voltage drop around 0.043 V. Based on the result obtained, the power for designed inverter is around 100W and efficiency recorded at 75%.
Constant Switching Frequency and Torque Ripple Minimization of DTC of Induction Motor Drives with Three-level NPC Inverter Huzainirah Ismail; Fazlli Patkar; Auzani Jidin; Aiman Zakwan Jidin; Noor Azida Noor Azlan; Tole Sutikno
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 8, No 3: September 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v8.i3.pp1035-1049

Abstract

Direct Torque Control (DTC) is widely applied for ac motor drives as it offers high performance torque control with a simple control strategy. However, conventional DTC poses some disadvantages especially in term of variable switching frequency and large torque ripple due to the utilization of torque hysteresis controller. Other than that, performance of conventional DTC fed by two-level inverter is also restricted by the limited numbers of voltage vectors which lead to inappropriate selection of voltage vectors for different speed operations. This research aims to propose a Constant Switching Frequency (CSF) torque controller for DTC of induction motor (IM) fed by three-level Neutral-Point Clamped (NPC) inverter. The proposed torque controller utilizes PI controller which apply different gain for different speed operation. Besides, the utilization of NPC inverter provides greater number of voltage vectors which allow appropriate selection of voltage vectors for different operating condition. Using the proposed method, the improvement of DTC drives in term of producing a constant switching operation and minimizing torque ripple are achieved and validated via experimental results.
FPGA Implementation of Low-Area Square Root Calculator Aiman Zakwan Jidin; Tole Sutikno
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 13, No 4: December 2015
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v13i4.1894

Abstract

Square root is one of the mathematical operations which are widely used in digital signal processing. Its implementation on hardware such as FPGA will provide several advantages compare to the performance offered in software. There are several algorithms which can be utilized for this calculation, but they are difficult to be implemented in FPGA. This paper presents a model of FPGA based square root calculator, which requires very low resources usage, thus occupying very low area of FPGA. The model is designed to suit the needs of medium-speed and low-speed applications which don’t need very high processing speed, while optimizing the number of resources utilized.The modified non-restoring algorithm is used in this design to compute the square root. The design is coded in RTL VHDL, and implemented in Altera DE2-board for hardware validation. The implementation produced very precise square root calculation, with low latency computation and low area consumption, for various input data width tested.
Overview on Strategies and Approaches for FPGA Programming Tole Sutikno; Nik Rumzi Nik Idris; Aiman Zakwan Jidin
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 12, No 2: June 2014
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v12i2.58

Abstract

This paper presents an overview of strategies and approaches for FPGA programming. At first, design entry methods are briefly introduced. Then, the concepts of FPGA programming in some perspective viewpoints, such as: execution perspective, modelling perspective, programming style perspective, construction methodology perspective and synthesis perspective will be explained. Finally, the principle of VHDL programming use synchronization-evolution-action approach is introduced.
Arduino Based Paperless Queue Management System Aiman Zakwan Jidin; Norfadzlia Mohd Yusof; Tole Sutikno
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 14, No 3: September 2016
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v14i3.3114

Abstract

Queue management system is designed in organizing queues at service sectors like banks and post offices, which expected to have a large number of customers daily. Conventional ways of managing queues like issuing paper tickets printed with queue number, leads to several problems such as paper tickets littering and also long queueing or waiting time. Therefore, this paper presents the development of a system to manage queues more efficiently and eco-friendly. The proposed system consists of a Graphical User Interface (GUI), which is used to obtain customers’ mobile phone numbers and the processing unit, which generates the queue number and initiate the ticket to be sent to customers’ mobile phones via SMS, thus replacing the utilization of papers. Moreover, this system additional features allow customers to remotely obtain their queue number just by sending request to the system through SMS, and also reminding the upcoming customers that their turns are nearly arriving, a feature which is very useful especially for those who are waiting outside the premise. Simulations and experimental tests were conducted to ensure the reliability and the efficiency of the proposed system. The proposed system is supporting the development of sustainable green technology, and the expected increase of system efficiency may contribute in improving customers’ satisfaction.
Development of vocabulary learning application by using machine learning technique Noor Mohd Ariff Brahin; Haslinah Mohd Nasir; Aiman Zakwan Jidin; Mohd Faizal Zulkifli; Tole Sutikno
Bulletin of Electrical Engineering and Informatics Vol 9, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (388.1 KB) | DOI: 10.11591/eei.v9i1.1616

Abstract

Nowadays an educational mobile application has been widely accepted and opened new windows of opportunity to explore. With its flexibility and practicality, the mobile application can promote learning through playing with an interactive environment especially to the children. This paper describes the development of mobile learning to help children above 4 years old in learning English and Arabic language in a playful and fun way. The application is developed with a combination of Android Studio and the machine learning technique, TensorFlow object detection API in order to predict the output result. Developed application namely “LearnWithIman” has successfully been implemented and the results show the prediction of application is accurate based on the captured image with the list item. The inclusion of the user database for lesson tracking and new lesson will be added for improvement in the future.