<![CDATA[The importance of dimension scaling in recent electronic devices has been forcing manufacturers to innovate on the structure as well as the conducting mechanism. The junctionless FETs (JLFETs) have shown the potential to further scaling process, by diminishing the requirement of junction for source and drain, in contrast to silicon on insulator (SOI) FETs. This paper focuses on comparing the subthreshold performance of junctionless FET and SOI MOSFET FET using TCAD tools. The result shows that in terms of subthreshold slope, JLFET approaches near ideal value of 60 mV/decade, which is superior than the SOI FET for similar doping rate. On the other hand, the threshold value shows different tendencies between those types of device.]]>
